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february 2010 doc id 16788 rev 2 1/26 1 stm6510 dual push-button smart reset tm with capacitor-adjustable delays features dual smart reset? push- button inputs with capacitor-adjustable extended reset setup delay (t src ) capacitor-adjustable reset pulse duration (t rec ) power-on reset ?rst active-low, open-drain factory-programmable thresholds to monitor v cc in the range of 1.575 to 4.625 v typ. operating voltage 1.0 v (active-low output valid) to 5.5 v low supply current (1.4 a) operating temperature: industrial grade ?40 c to +85 c tdfn8 package: 2 mm x 2 mm x 0.75 mm rohs compliant applications mobile phones, smartphones e-books mp3 players games portable navigation devices any application that requires delayed reset push-button(s) response for improved system stability tdfn8 (dg) 2 mm x 2 mm www.st.com
contents stm6510 2/26 doc id 16788 rev 2 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 smart reset? devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 stm6510 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.3 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.3.1 power supply (v cc ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.3.2 ground (v ss ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.3.3 smart reset? push-button inputs (sr0 , sr1 ) . . . . . . . . . . . . . . . . . . . . 9 1.3.4 adjustable delay of smart reset? input (src pin) . . . . . . . . . . . . . . . . 9 1.3.5 reset output (rst ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.3.6 adjustable reset timeout (trec adj pin) . . . . . . . . . . . . . . . . . . . . . . . . 10 2 typical operating char acteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7 package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
stm6510 list of tables doc id 16788 rev 2 3/26 list of tables table 1. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. tsrc programmed by an ideal external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 3. trec programmed by an ideal external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 5. operating and measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 6. dc and ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 7. possible vcc voltage thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 8. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data . . . . . . . . . . . . . 18 table 9. parameter for landing pattern - tdfn ? 8-lead 2 x 2 mm package . . . . . . . . . . . . . . . . . . 19 table 10. carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 11. reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 12. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 13. package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 14. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of figures stm6510 4/26 doc id 16788 rev 2 list of figures figure 1. logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. single-button smart reset? typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 5. dual-button smart reset? typical hookup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 6. timing waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 7. supply current (i cc ) vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 8. smart reset? delay (t src ) vs. temperature, c src = 0.56 f . . . . . . . . . . . . . . . . . . . . . . 11 figure 9. reset timeout period (t rec ) vs. temperature, c trec = 0.01 f . . . . . . . . . . . . . . . . . . . . . 12 figure 10. reset threshold (v rst ) vs. temperature, ?s? threshold option, v cc falling. . . . . . . . . . . . . 12 figure 11. ac testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 12. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline . . . . . . . . . . . . . . . . . . . . . 18 figure 13. landing pattern - tdfn ? 8-lead 2 x 2 mm without thermal pad . . . . . . . . . . . . . . . . . . . . 19 figure 14. carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 15. reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 16. tape trailer/leader. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 17. pin 1 orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 18. package marking, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
stm6510 description doc id 16788 rev 2 5/26 1 description 1.1 smart reset? devices the smart reset? device family stm65xx provides a useful feature that ensures inadvertent short reset push-button closures do not cause system resets. this is done by implementing an extended smart reset? input delay (t src ). once the valid smart reset? input levels and setup delay are met, the device generates an output reset pulse with user- programmable timeout period (t rec ). the typical application hookup shows that the dual smart reset? inputs can be also connected to the applications interrupt to allow the control of both the interrupt pin and the hard reset functions. if the push-buttons are closed for a short time, the processor is only interrupted. if the system st ill does not respond pr operly, holding the push-buttons for the extended setup time (t src ) causes a hard reset of the processor through the reset output. the smart reset? feature helps sign ificantly increase system stability. the stm65xx family of smart reset? devices consists of low-current microprocessor reset circuits targeted at applications such as mp3 players, portable navigation devices or mobile phones, generally any application that requires delayed reset push-button(s) response for improved system stability. t he stm65xx devices feature single or dual smart reset? inputs (srx). the delayed smart reset? setup time (t src ) options are adjustable by adding an external capacitor on the src pin or selectable by three-state logic. the delayed setup period ignores switch closures shorter than t src , thus preventing undesired resets. the stm65xx devices have active-low (opt ionally active-high) open-drain reset (rst ) output(s) with or without an internal pull-up resistor or push-pull as output options, with or without the power-on reset function. some devices also have an undervoltage monitoring feature: the reset output is also asserted when the monitored supply voltage v cc drops below the specified threshold. the reset output remains asserted for the reset timeout period (t rec ) after the monitored supply voltage goes above the specified threshold. 1.2 stm6510 the stm6510 has two combined smart reset? inputs (sr0 and sr1 ) with smart reset? setup delay (t src ) programmed by an external capacitor on the src pin. an additional stm6510 feature is adjustable output reset pulse time t rec by adding an external capacitor (c trec ). additionally, the v cc is monitored and if it drops below the selected v rst threshold, the reset output goes active and remains active while v cc is below the v rst threshold, plus the defined duration of the reset pulse t rec .
description stm6510 6/26 doc id 16788 rev 2 figure 1. logic diagram figure 2. pin connections table 1. signal names symbol input/output description rst output reset output, active-low (open-drain). sr0 input primary push-button smart reset? input. active-low, internal 65 k pull-up resistor to v cc . sr1 input secondary push-button smart reset? input. active-low, internal 65 k pull-up resistor to v cc . src input smart reset? input delay setup control. connect an external capacitor to this pin to adjust the delay setup time (t src ). trec adj input input pin for t rec reset pulse duration adjustment. connect an external capacitor (c trec ) to this pin to determine t rec . v cc supply supply voltage input. power supply for the device and an input for the monitored supply voltage. a 0.1 f decoupling ceramic capacitor is recommended to be connected between v cc and v ss pins. v ss supply ground nc no connect (not bonded); should be connected to v ss. am00389a v cc rst trec adj v ss stm6510 sr1 sr0 src am00390 nc trec adj src 1 2 3 stm 6510 4 8 7 6 5 rst v ss v cc sr1 sr0
stm6510 description doc id 16788 rev 2 7/26 figure 3. block diagram am00391a v cc v rst compare sr0 src rst t rec generator logic sr1 c trec trec adj 65 k 65 k
description stm6510 8/26 doc id 16788 rev 2 figure 4. single-button smart reset? typical hookup note: when only one smart reset? input push-button is used, tie both the sr inputs together. figure 5. dual-button smart reset? typical hookup am04870v1 sr0 src sr1 rst v ss v cc int/ nmi v ss push-button switch mcu reset stm6510 100 k v cc v cc c src trec adj c trec am004871v1 v cc sr0 sr1 src rst v ss v cc int/ nmi v ss push-button switch mcu push-button switch reset stm6510 100 k v cc c src trec adj c trec
stm6510 description doc id 16788 rev 2 9/26 1.3 pin descriptions 1.3.1 power supply (v cc ) this pin is used to provide the power to the smart reset? device and to monitor the power supply. a 0.1 f decoupling ceramic capacitor is recommended to be connected between the v cc and v ss pins. 1.3.2 ground (v ss ) this is the supply ground for the device. 1.3.3 smart reset? push-button inputs (sr0 , sr1 ) both sr0 and sr1 need to be held active at the same time for at least t src to activate the reset output pulse. include an internal 65 k pull-up resistor to v cc for each input. figure 6. timing waveforms 1.3.4 adjustable delay of smart reset? input (src pin) this pin controls the setup time before the push-button action is validated by the reset output. it is connected to an external capacitor (c src ), which is tied to ground to provide the desired value of setup time (t src ). calculated t src and c src examples are given in table 2 . refer also to table 6 . am00393 rst sr0 sr1 t src t rec table 2. t src programmed by an ideal external capacitor calculated c src value [f] setup delay t src [s] (1)(2) 1. example calculations based on an ideal capacitor. during applicati on design and component selection it should be considered that the curr ent flowing into the external t src programming capacitor (c src ) is on the order of 100 na, therefore a low-leakage capacit or (ceramic or film capacitor) and an adequate pcb environment should be used to prevent t src accuracy from being affected. a recommended minimum value of c src is 0.01 f. 2. in case of repeated activations of the t src counter, an interval of 10 ms min. is needed between the activations to fully discharge c src , so that the next t src is as specified. closest common c src value [f] min. typ. max. 0.2 2 3 4 0.22 0.3 3 4.5 6 0.33 0.6 6 9 12 0.56 11015201
description stm6510 10/26 doc id 16788 rev 2 1.3.5 reset output (rst ) rst is active-low, open-drain. 1.3.6 adjustable reset timeout (trec adj pin) the reset timeout (t rec ) is adjustable by connecting an external capacitor c trec to this pin. calculated t rec and c trec examples are given in table 3 . refer also to table 6 . table 3. t rec programmed by an ideal external capacitor calculated c trec value [f] t rec [ms] (1)(2) 1. example calculations based on an ideal capacitor. during applicati on design and component selection it should be considered that the curr ent flowing into the external t rec programming capacitor (c trec ) is on the order of 100 na, therefore a low-leakage capacit or (ceramic or film capacitor) and an adequate pcb environment should be used to prevent t rec accuracy from being affected. a recommended minimum value of c trec is 0.001 f. 2. in case of repeated activations of the t rec counter, an interval of 10 ms min. is needed between t rec intervals to fully discharge c trec , so that the next t rec is as specified. closest common c trec value [f] min. typ. max. 0.001 10 15 20 0.001 0.002 20 30 40 0.0022 0.01 100 150 200 0.01 0.014 140 210 280 0.015 0.028 280 420 560 0.027 0.056 560 840 1120 0.056 0.112 1120 1680 2240 0.1
stm6510 typical operating characteristics doc id 16788 rev 2 11/26 2 typical operating characteristics figure 7. supply current (i cc ) vs. temperature figure 8. smart reset? delay (t src ) vs. temperature, c src = 0.56 f 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 -60 -40 -20 0 20 40 60 80 100 120 140 temperature [c] i cc [a] 5.5 v 3.3 v 5 v 3 v am04 8 76v1 6 7 8 9 10 11 12 -60 -40 -20 0 20 40 60 80 100 120 140 temperature [c] t src [s] 5.75 v 5.5 v 3.3 v am04 8 77v1
typical operating characteristics stm6510 12/26 doc id 16788 rev 2 figure 9. reset timeout period (t rec ) vs. temperature, c trec = 0.01 f figure 10. reset threshold (v rst ) vs. temperature, ?s? threshold option, v cc falling 100 110 120 130 140 150 160 170 180 190 200 -60 -40 -20 0 20 40 60 80 100 120 140 temperature [c] t rec [ms] 5.75 v 5.5 v 3.3 v am04 8 7 8 v1 2.85 2.87 2.89 2.91 2.93 2.95 2.97 2.99 -60 -40 -20 0 20 40 60 80 100 120 140 temperature [c] v rst [v] am04 8 79v1
stm6510 maximum ratings doc id 16788 rev 2 13/26 3 maximum ratings stressing the device above the rating listed in the table 4: absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not imp lied. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics? sure program and other relevant quality documents. table 4. absolute maximum ratings symbol parameter value unit t stg storage temperature (v cc off) ?55 to +150 c t sld (1) 1. reflow at peak temperature of 260 c. the time above 255 c must not exceed 30 seconds. lead solder temperature for 10 seconds 260 c ja thermal resistance (junction to ambient) tdfn8 149.0 c/w v io input or output vo ltage ?0.3 to v cc +0.3 v v cc supply voltage ?0.3 to 7 v
dc and ac parameters stm6510 14/26 doc id 16788 rev 2 4 dc and ac parameters this section summarizes the operating measurement conditions, and the dc and ac characteristics of the device. the parameters in the table 6: dc and ac characteristics that follow, are derived from tests performed under the measurement conditions summarized in table 5: operating and measurement conditions . designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. figure 11. ac testing input/output waveforms table 5. operating and measurement conditions parameter value unit v cc supply voltage 1.0 to 5.5 v ambient operating temperature (t a ) ?40 to +85 c input rise and fall times 5ns input pulse voltages 0.2 to 0.8 v cc v input and output timing ref. voltages 0.3 to 0.7 v cc v 0.8 v cc 0.2 v cc 0.7 v cc 0.3 v cc am00478
stm6510 dc and ac parameters doc id 16788 rev 2 15/26 table 6. dc and ac characteristics symbol parameter test conditions (1) min. typ. (2) max. units v cc supply voltage range reset output valid - active-low 1.0 5.5 v i cc supply current (v cc ) v cc = 5.0 v 1.5 2.4 a v cc = 3.0 v (3) 1.4 a v ol reset output voltage low v cc 4.5 v, sinking 3.2 ma 0.3 v v cc 3.3 v, sinking 2.5 ma 0.3 v v cc 1.0 v, sinking 0.1 ma 0.3 v v rst v cc undervoltage reset threshold (refer to ta ble 7 ) ?40 to +85 c v rst ?2.5% v rst v rst +2.5% v 25 c v rst ?2.0% v rst v rst +2.0% v v hyst hysteresis of v rst l, m 0.5% t, s, r, z, y, w, v 1% v cc to reset delay (4) v cc falling from (v rst + 100 mv) to (v rst - 100 mv) at 10 mv/s 20 s t rec (4) user-adjustable reset timeout period on rst . refer to table 3 . 10 000 x c trec (f) 15 000 x c trec (f) 20 000 x c trec (f) ms smart reset? inputs t src (5) user-adjustable delayed smart reset? setup time. refer to table 2 . 10 x c src (f) 15 x c src (f) 20 x c src (f) s v il sr0 , s r1 input voltage low 0.3 v cc v v ih sr0 , sr1 input voltage high 0.7 v cc v r pui internal pull-up resistor, sr0 , sr1 inputs 65 k 1. valid for ambient operating temperature: t a = ?40 to +85 c; v cc = 1.0 to 5.5 v (except where noted). 2. typical value is at 25 c and v cc = 3.3 v unless otherwise noted. 3. for devices with v rst < 3.0 v. 4. guaranteed by design. 5. input glitch immunity is equal to t src (when both sr inputs are low, otherwise infinite).
dc and ac parameters stm6510 16/26 doc id 16788 rev 2 table 7. possible v cc voltage thresholds v cc voltage threshold v rst typ. 2.5% (?40 c to +85 c) 2.0% (25 c) unit min. max. min. max. l (falling) 4.625 4.509 4.741 4.533 4.718 v m (falling) 4.375 4.266 4.484 4.288 4.463 v t (falling) 3.075 2.998 3.152 3.014 3.137 v s (falling) 2.925 2.852 2.998 2.867 2.984 v r (falling) 2.625 2.559 2.691 2.573 2.678 v z (falling) 2.313 2.255 2.371 2.267 2.359 v y (falling) 2.188 2.133 2.243 2.144 2.232 v w (falling) 1.665 1.623 1.707 1.632 1.698 v v (falling) 1.575 1.536 1.614 1.544 1.607 v
stm6510 package mechanical data doc id 16788 rev 2 17/26 5 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data stm6510 18/26 doc id 16788 rev 2 figure 12. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline table 8. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data symbol dimension (mm) dimension (inches) min. nom. max. min. nom. max. a 0.70 0.75 0.80 0.028 0.030 0.031 a1 0.00 0.02 0.05 0.000 0.001 0.002 b 0.15 0.20 0.25 0.006 0.008 0.010 d bsc 2.00 0.079 e bsc 2.00 0.079 e 0.50 0.020 l 0.45 0.55 0.65 0.018 0.022 0.026 e l bottom view 8 5 pin#1 id 1 pin 1 index area 4 b e 0.10 c a a1 plane seat ing top view 2x 2x d pin 1 index area 0.10 c 0.10 c 0.08 c 0.10 c a b b a c 8070540_a side view
stm6510 package mechanical data doc id 16788 rev 2 19/26 figure 13. landing pattern - tdfn ? 8-lead 2 x 2 mm without thermal pad table 9. parameter for landing pattern - tdfn ? 8-lead 2 x 2 mm package parameter description dimension (mm) min. nom. max. l contact length 1.05 ? 1.15 b contact width 0.25 ? 0.30 e max. land pattern y-direction ? 2.75 ? e1 contact gap spacing ? 0.65 ? d max. land pattern x-direction ? 1.75 ? p contact pitch ? 0.5 ? am00441 d p e1 e l b
package mechanical data stm6510 20/26 doc id 16788 rev 2 figure 14. carrier tape t k 0 p 1 a 0 b 0 p 2 p 0 center lines of cavity w e f d top cover tape user direction of feed am03073v2 table 10. carrier tape dimensions package w d e p 0 p 2 fa 0 b 0 k 0 p 1 tunit bulk qty. tdfn8 8.00 + 0.30 ?0.10 1.50 +0.10/ ?0.00 1.75 0.10 4.00 0.10 2.00 0.10 3.50 0.05 2.30 0.05 2.30 0.05 1.00 0.05 4.00 0.10 0.250 0.05 mm 3000
stm6510 package mechanical data doc id 16788 rev 2 21/26 figure 15. reel dimensions table 11. reel dimensions tape sizes a max. b min. c d min. n min. g t max. 8 mm 180 (7 inches) 1.50 13.0 +/? 0.20 20.20 60 8.4 +2/?0 14.40 a d b c n t am00443 40 mm min. acces hole at slot location tape slot in core for tape start 25 mm min width full radius g measured at hub
package mechanical data stm6510 22/26 doc id 16788 rev 2 figure 16. tape trailer/leader figure 17. pin 1 orientation note: 1 drawings are not to scale. 2 all dimensions are in mm, unless otherwise noted. leade r trailer 10 0 mm min. start 160 mm min. 400 mm min. end am00444 to p cover tape user direction of feed sealed with cover tape no components no components components am00442 user direction of feed
stm6510 part numbering doc id 16788 rev 2 23/26 6 part numbering table 12. ordering information scheme for device options currently available refer to table 13 . for other options, voltage threshold values etc. or for more information on any aspect of this device, please contact the st sales office nearest you. example: stm6510 w c a c dg 6 f device type stm6510 reset (v cc monitoring threshold) voltage v rst l = 4.625 v (typ., falling) m = 4.375 v t = 3.075 v s = 2.925 v r = 2.625 v z = 2.313 v y = 2.188 v w = 1.665 v v = 1.575 v smart reset? setup delay control (t src ); presence of internal input pull-up on all smart reset? inputs (sr0 , sr1 ) c = 1 to 15 s, user-programmable (external capacitor); 65 k input pull-up output type a = open-drain, active-low reset timeout period (t rec ) c = user-programmable (external capacitor) package dg = tdfn8 - 2 x 2 x 0.75 mm, 0.5 mm pitch temperature range 6 = ?40 c to +85 c shipping method f = ecopack ? package, tape and reel
package marking stm6510 24/26 doc id 16788 rev 2 7 package marking table 13. package marking note: al = active-low, ah = active-high; pu = with internal pull-up re sistor, od = open-drain. figure 18. package marking, top view part name t src delay control smart reset? inputs type v rst reset output type t rec programming topmark stm6510wcacdg6f c src al, pu w al, od c trec 8wk stm6510scacdg6f c src al, pu s al, od c trec 8sk STM6510RCACDG6F c src al, pu r al, od c trec 8rk am00479 a bc d e topmark a = dot (pin 1 reference) b = assembly plant (p) c = assembly year (y, 0-9): 9 = 2009 etc. d = assembly work week (ww, 01 to 52): 20 = ww20 etc. e = marking area (topmark)
stm6510 revision history doc id 16788 rev 2 25/26 8 revision history table 14. document revision history date revision changes 12-feb-2010 1 initial release. 26-feb-2010 2 updated title of datasheet, features , applications ; updated footnote 1 of table 2 ; updated table 6 , 12 , 13 ; figure 3 ; section 1.3.3 ; minor textual and formatting changes.
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